Variable delay circuits are used in many applications, often to adjust the phase of an input signal. In some applications, variable delay circuits align clock edges between multiple systems. Variable delay circuits have certain parameters that are characteristic of the specific circuit design that effect the applicability of the circuit to a certain application. Three examples of these certain parameters are resolution (e.g. the number of selectable delays between the minimum delay and the maximum delay), noise susceptibility (e.g. distortions to the output signal caused by noise introduced to the input signal), maximum operable frequency (e.g. the maximum frequency at which a clocked signal can be input into the variable delay circuit without unacceptable levels of signal degradation), and maximum data rate (e.g. the highest amount of bandwidth that can pass through the variable delay circuit without unacceptable levels of signal degradation, such as inter-symbol interference). In some variable delay circuits, the certain parameters change depending on the selected delay. For example, in variable delay circuits that rely on the R-C (resistive-capacitive) response of the circuit, noise susceptibility may become more prominent as the selected delay increases.
Certain examples have features that are in addition to or in lieu of the features illustrated in the above-referenced figures. Certain labels may be omitted from certain figures for the sake of clarity.